The CPU has fetched its first instruction from the reset vector and jumped to the main body of the BIOS firmware. No operating system is running. No drivers are loaded. The firmware is alone with the bare hardware, and it has one job: get the system into a state where an operating system can take over.
The first thing the firmware does is test whether the hardware is working at all. This test has a name that has survived four decades of computing: the Power-On Self Test, or POST.
What Is the BIOS?
BIOS stands for Basic Input/Output System. It is firmware -- software permanently stored on a chip on the motherboard. Unlike programs you install on a hard drive, the BIOS is present from the factory. It is the first code that runs on the machine.
The original IBM PC BIOS, released in 1981, fit in 8 KB of ROM. It provided basic routines for reading the keyboard, writing characters to the screen, and accessing floppy disks. Modern BIOS firmware (or its successor, UEFI) is measured in megabytes and handles tasks that the original designers never imagined: USB, PCIe, SATA, network boot, Secure Boot, and more.
Regardless of how complex modern firmware has become, the first task remains the same: test the hardware.
The Power-On Self Test
POST is a series of diagnostic checks that the firmware performs immediately after gaining control of the CPU. These tests verify that the most fundamental hardware components are working before the firmware attempts anything more complex.
POST is not a single test. It is an ordered sequence of tests, and the order matters. The firmware tests the most basic components first, because later tests depend on earlier components working. You cannot test RAM if the memory controller is broken. You cannot display an error message if the video card is dead.
CPU Register Test
The very first test checks whether the CPU's own registers work correctly. The firmware writes known values to each register and reads them back. If a register cannot hold a value, the CPU is fundamentally broken and nothing else can proceed.
This test runs without RAM (which has not been initialized yet) and without any display output. If it fails, the system halts silently or the motherboard signals the failure through a POST code display or a pattern of beeps from the speaker.
ROM Checksum Verification
Next, the firmware verifies its own integrity. It reads through the entire BIOS ROM and computes a checksum -- a mathematical summary of all the bytes. If the checksum does not match the expected value, the firmware itself is corrupt. This can happen due to a failed firmware update, a degraded flash chip, or cosmic ray bit-flips (rare but real).
Memory Controller Initialization
This is one of the most complex and important tasks POST performs. The firmware must:
- Detect which DIMM slots have memory installed.
- Read the SPD data from each DIMM to learn its specifications.
- Configure the memory controller with the correct speed, timings, and voltage.
- "Train" the memory interface -- adjusting signal timing to account for the physical characteristics of the traces on the motherboard.
Memory training is a process where the firmware sends test patterns through the memory interface and adjusts timing parameters until data can be read back reliably. This process can take several hundred milliseconds -- it is one reason why turning on a computer is not instantaneous.
Once memory is initialized and tested, the firmware finally has RAM to work with. It can set up a stack, allocate buffers, and store variables. The execution environment goes from "CPU registers only" to something resembling a normal programming environment.
RAM Test
After the memory controller is configured, the firmware tests the RAM itself. The classic RAM test writes a pattern to every address (often alternating 0x55 and 0xAA, which represent alternating bit patterns) and reads it back. If any location fails to hold its value, the firmware knows that RAM module is defective.
Modern systems often perform a quick RAM test rather than testing every byte, because testing 64 GB of memory byte-by-byte would take a very long time. The BIOS setup menu usually has an option to enable a thorough memory test if you suspect a problem.
Video Initialization
Once RAM is working, the firmware initializes the video system. On a machine with a discrete graphics card, this involves loading and executing the video card's option ROM -- firmware stored on the graphics card itself. On systems with integrated graphics, the main BIOS handles video initialization directly.
This is the moment when you first see something on the screen. Before this point, the monitor has been receiving no signal. Now, the BIOS can display its manufacturer logo or a text-mode screen showing POST progress.
Beep Codes: When the Screen Is Not Available
What happens when POST detects a failure before the video system is initialized? The firmware cannot display an error message because the display is not working yet. Instead, it uses the only output device available at that stage: the PC speaker.
The BIOS generates a pattern of beeps to indicate which test failed. These patterns are called beep codes, and they vary by BIOS manufacturer.
A single short beep from an Award BIOS means POST completed successfully. One long beep followed by two short beeps means the video card failed. Continuous long beeps mean no memory was detected. Each BIOS vendor (Award, AMI, Phoenix) has its own set of codes.
Modern motherboards often replace or supplement beep codes with a two-digit hexadecimal POST code display -- a pair of seven-segment LEDs on the board that show the current POST stage. If the system hangs, the displayed code tells you exactly which test it got stuck on. These codes are listed in the motherboard manual.
Beyond POST: Hardware Enumeration
Once POST confirms that the basic hardware is functional, the BIOS moves on to more complex initialization. This phase detects and configures all the devices attached to the system.
PCI/PCIe Bus Enumeration
The BIOS scans the PCI and PCIe buses to discover what devices are installed -- graphics cards, network adapters, storage controllers, sound cards. Each device has a set of configuration registers that the BIOS reads to identify the device and assign it resources (memory-mapped I/O regions, interrupt lines, and so on).
Option ROM Execution
Many expansion cards carry their own firmware, called an option ROM. The video card's option ROM initializes the GPU and provides basic display services. A network card's option ROM might provide PXE boot capability. A RAID controller's option ROM provides access to its disk arrays.
The BIOS scans for option ROMs in a specific memory range (0xC0000 to 0xDFFFF), validates their checksums, and executes them one by one. This is why you sometimes see a separate splash screen from your graphics card or RAID controller before the main BIOS screen appears.
Interrupt Vector Table
The BIOS sets up the interrupt vector table (IVT) in the first 1 KB of RAM (addresses 0x0000 to 0x03FF). This table contains 256 entries, each pointing to a routine that handles a specific interrupt. Hardware interrupts from the keyboard, timer, and disk controller all route through this table.
The IVT is a real-mode structure, and it will be replaced entirely when the operating system switches to protected mode. But during the boot process, everything -- keyboard input, disk reads, screen output -- relies on the BIOS interrupt handlers in this table.
The BIOS Setup Screen
You have probably seen it: press Delete or F2 during POST and you get a screen full of settings. This is the BIOS setup utility. It allows you to configure boot order, memory timings, CPU settings, and dozens of other parameters.
These settings are stored in a small battery-backed memory called CMOS RAM (or, on modern systems, in a section of the SPI flash chip). The battery -- the coin cell on your motherboard -- keeps these settings alive when the system is powered off.
The BIOS reads these settings during POST to determine how to configure the hardware. If the CMOS battery dies, the settings revert to factory defaults, which is why a dead CMOS battery often causes the system to lose its date and time.
Finding a Boot Device
After all hardware is initialized and tested, the BIOS has one final task: find an operating system to load.
The BIOS checks devices in the order specified by the boot priority list (configured in the BIOS setup). For each device, it attempts to read the first sector -- 512 bytes -- from the device. If the last two bytes of that sector are 0x55 and 0xAA (the boot signature), the BIOS considers the device bootable.
The BIOS loads those 512 bytes into RAM at address 0x7C00 and jumps to that address. Control passes from the firmware to whatever code was in that boot sector. On a legacy BIOS system, this is the Master Boot Record (MBR), which typically contains a small bootloader that knows how to find and load a larger bootloader (like GRUB), which in turn loads the operating system kernel.
The address 0x7C00 is another one of those historical artifacts. It was chosen by the designers of the original IBM PC 5150 in 1981. The number has no deep significance -- it was simply a convenient location in memory that would not conflict with anything else. But because the entire PC ecosystem depends on it, it has persisted for over four decades.
The BIOS Data Area
During POST, the BIOS writes a collection of data to a reserved region of RAM starting at address 0x0400, known as the BIOS Data Area (BDA). This region contains information the BIOS has gathered about the system: the number and type of disk drives, the amount of conventional memory, the keyboard buffer, serial and parallel port addresses, and the current video mode.
The BDA is a communication channel. The BIOS writes it; early boot code and real-mode operating systems read it. It is yet another structure that only matters in real mode and will be overwritten once the operating system takes over.
Limitations of the Legacy BIOS
The traditional BIOS, for all its importance, has significant limitations:
- Real mode only: The BIOS runs in 16-bit real mode with a 1 MB address limit. It cannot directly use modern CPU features.
- MBR partition limit: The MBR partition table supports a maximum of four primary partitions and disks up to 2 TB.
- No standard security model: There is no mechanism to verify that the code being loaded is authentic.
- No standard driver model: Each device needs its own option ROM; there is no plug-in driver architecture.
- Slow initialization: The sequential, one-device-at-a-time nature of POST is slow on modern systems with many devices.
These limitations led to the development of UEFI, which replaces the legacy BIOS with a more modern firmware interface. UEFI runs in 32-bit or 64-bit mode, supports the GPT partition scheme (allowing disks larger than 2 TB and up to 128 partitions), includes a standard driver model, and provides Secure Boot for verifying boot code integrity.
We will cover UEFI in detail in Article 04. But first, a brief detour to explain why the rest of this series focuses on one particular operating system.
Next: Why Linux?